Logic-controlled thyristor system for performing tap-changing operations

ABSTRACT

A system for performing tap-changing operations on tapped regulating transformers by thyristor networks and relatively movable contact means. The trigger pulse generators for the thyristors of the networks are controlled by sensors whose output is fed into a logic circuitry. The sensors include a pair of sensors responsive to the position of current-carrying contacts, a pair of sensors responsive to the position of disconnect contacts and a pair of sensors responsive to the voltage across a thyristor network.

United States Patent [1 1 Matzl [54] LOGIC-CONTROLLED THYRISTOR SYSTEMFOR PERFORMING TAP- CHANGING OPERATIONS [75] Inventor: Manfred Man], 693Eberbach/ Neckar, Dr.-Weiss-Strasse 23, Germany 221 Filed: Jan. 21,1672

[21] .Appl. No.: 219,706

[30] Foreign Application Priority Data Jan. 29, 1971 Germany ..P 21 04075.5 [52] US. Cl ..323/43.5 S [51] Int, Cl. ..G05f [58] Field of Search.t. ..323/43.5, 43.5 S

[56] References Cited UNITED STATES PATENTS 3,437,913 4/1969 Matzl..323/43.5 S

[451 Jan. 9, 1973 3,466,530 9/1969 Matzl ..323/43.5 S

Pri'mary Examiner-William H.'Beha, Jr.

7 Attorney-Erwin Salzer 57 ABSTRACT A system for performing tap-changingoperations on tapped regulating-transformers by thyristor networks andrelatively movable contact means. The trigger pulse generators for thethyristors ,of the networks are controlled by sensors whose output isfed into a logic circuitry. The sensors include a pair of sensorsresponsive to the position of current-carrying contacts, a pair ofsensors responsive to the position of disconnect contacts and a pair ofsensors responsive to the voltage across a thyristor network.

5 Claims, 4 Drawing Figures PAIENIEDJAn 9 I973 SHEET 1 [IF 2 PATENTEUJAN 9 I973 SHEET 2 OF 2 M m #m A w. 5 A a N1 M 1 w w 47 5. 4 62 w (a? aBACKGROUND OF THE INVENTION The starting point of the present inventionare socalled Jansen-type tap-changing switching systems for regulatingtransformers. A conventional Jansen-type tap-changing switching systemincludes, in addition to a tapped transformer winding, a selector switchand a transfer'switch, and the latter is provided with a plurality oftap-changing resistors, or change-over resistors. Modern versions of Jansen-type tap-changing switching systems are disclosed in U.S. Pat. No.3,396,254 to A. Bleibtreu, Aug. 6, 1968 for ARRANGEMENT FOR AVOIDINGEDDY CURRENT LOSSES IN TRANSFER SWITCH AND SELECTOR SWITCH UNITS WITHINTERPOSED GEAR DRIVE and in U.S. Pat. No. 3,493,698 to U. G. E.Schweitzer Feb. 3, 1970 for TAP-CHANGING TRANSFORMER IN- 'CLUDING ASELECTOR SWITCH AND A TRANSFER SWlTCl-I. Reference may be had to thesepatents for a more complete disclosure of Jansen-type tap-changingswitching systems.

In more recent times there has been a trend toward substitutingtap-changing transfer switches including thyristors for the moreconventional transfer switches with their relatively bulky tap-changingresistors, or change-over resistors. Typical examples of tap-changingswitching systems including thyristors are disclosed in U.S. Pat. No.3,502,961 to M. Matzl, Mar. 24, 1970 for TARCI-IANGING TIIYRISTORCIRCUITRY FOR REGULATING TRANSFORMERS; U.S. Pat. No. 3,534,246 to M.Matzl, Oct. 13, 1970 for TAP- CHANGING SYSTEM INCLUDING Tl-IYRISTORS FOREFFECTING TAP-CHANGES IN THREE- PHASE TRANSFORMERS and U.S. Pat. No.3,579,092 to M. Matzl, May 18, 1971 for TAP- CI-IANGING REGULATINGTRANSFORMER WITH soup STATE CIRCUITRY. The present invention is animmediate outgrowth of the systems disclosed in detail in the threeabove patents to M. Matzl to which reference may be had for certaindetails which will not 'be described below to avoid unnecessaryrepetitions.

The systems disclosed in the three above patents to M. Matzl includethyristor circuits and mechanical switching devices having relativelymovable contacts. The latter must be operated in a predeterminedsequence and timing. One object of this invention is to provide systemsas disclosed in the above patents to M. Matzl with logic circuitry toautomate the operation thereof.

Conventional transfer switches including tap-changing resistors, orchange-over resistors, as disclosed in the aforementioned U.S. Pat. Nos.3,396,254 and 3,493,698 have a timing of contact separation and a timingof engagement of the relatively movable contacts other than thatrequired in a thyristor tap-changing system such as disclosed in thethree above patents to M. Matzl. It is desirable to eliminate inconventional designs of transfer switches the tap-changing orchange-over resistors thereof, to associate such transfer switches withswitch-over thyristor networks as shown in U.S. Pat. Nos. 3,502,691;3,534,246 and 3,579,092 to M. Matzl, and to provide means which enablesuch a drastic change of the entire system without changing the timingof contact engagement and the timing of contact separation of theconstituent contacts of a more or less conventional Jansen-type transferswitch. It is another object of this invention to provide means whichallow a transfer switch originally designed to be operatively related totap-changing resistors, or change-over resistors, to be operativelyrelated to tapchanging thyristor networks such as shown in the aboveMatzl references.

SUMMARY OF THE INVENTION Tap-changing switching systems or tap-changingtransfer switches embodying this invention include a pair of thyristornetworks, a pair of disconnect switch means each connected in serieswith one of said pair of thyristor networks and a pair ofcurrent-carrying contact means each arranged to be shunted across one ofsaid pair of thyristor networks and one of said pair of disconnectswitch means. The system further includes a pair of voltage sensors eachsensing the voltage prevailing across one of said thyristor networks.The system further includes two pairs of position sensors one sensingthe position of one of said pair of current-carrying contact means andthe other the position of one of said pair of disconnect switch means.The output of said pair of voltage sensors and the output of said twopairs of position sensors is fed into a logic system the output of whichcontrols a pair of trigger pulse generators for triggering theconstituent thyristors of the aforementioned pair of thyristor networks.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram of a tap-changingsystem including thyristor circuits to which the invention is intendedto be applied; I

FIG. 2 is a diagrammatic representation of the sequence and timing ofcontact operations in a system as shown in FIG. 1 but including atransfer switch initially designed to be associated with ohmicchange-over resistors rather than thyristor networks;

FIG. 3 is a circuit diagram of one logic circuitry embodying the presentinvention; and

FIG. 4 is a circuit diagram of another logic circuitry embodying thepresent invention.

DESCRIPTION OF PREFERRED EMBODIMENTS OF THE INVENTION Referring now toFIG. 1, numerals 1 and 2 have been applied to indicate contacts of aselector switch engaging taps U U of a tapped transformer winding Tr.The system includes two thyristor networks St, and Stg. The formernetwork St, is made up of a pair of inversely parallel connectedthyristors 7,8 and the latter network St is made up of a pair ofinversely parallel connected thyristors 9,10. Network St, is connectedin series with disconnect switch 5 and network St is connected in serieswith disconnect switch 6. Current-carrying switch 3 is arranged to beshunted across network St, and disconnect 5, while current-carryingswitch 4 is arranged to be shunted across network St, and disconnectswitch 6. Reference character Y has been applied to indicate an outgoingload current-carrying line.

Assuming it is intended to change from tap U; to tap U This is initiatedby closing both disconnects or disconnect contacts 5,6. Thereupon theflow of load current is transferred or commutated from thyristors 7,8 tothyristors 9,10. Finally the current-carrying switch 4 is closed anddisconnects 5,6 are opened, thus causing the load current to flow fromtap U, by way of current-carrying switch 4 directly to outgoing line Y.Current-carrying switch 3 is opened shortly after closing of disconnects5,6.

The timing of contact separation and contact engagement in conventionalJansen-type transfer switches is not quite that which has been indicatedabove. The timing of contact operation in conventional Jansen-typetransfer switches involving switching resistors has been shown in FIG. 2where duration of contact operation is plotted against time. It isapparent from FIG. 2 that in conventional Jansen-type transfer switchesthe times of operation of all contacts including current-carryingcontacts 3,4 and of disconnect contacts 5,6 overlap.

This raises the problem of adapting a switch mechanism havingoverlapping contact operating times such as shown in FIG. 2 to control apair of thyristor networks as shown in FIG. 1 in order to effect atapchanging operation from a first tap U, to a second tap U,, or viceversa, from a second tap U, to a first tap U F I68. 3 and 4 each showsdiagrammatically a circuitry which offersa solution to the aboveproblem. The same reference characters have been applied in FIGS. 1, 3and 4 to indicate like parts.

Thus in FIG. 3 reference character St, has been applied to indicate afirst network including a pair of thyristors 7,8 inversely connected inparallel and reference character St, has been applied to indicate asecond network including a pair of thyristors 9,10 inversely connectedin parallel. The network St, further includes capacitor 40 and resistor42 which are connected in series and the network St, further includesthe capacitor 41 and the resistor 43 which are connected in series.Thyristors 7,8 may be triggered by trigger pulse transformer 11 theprimary winding of which may be energized by trigger pulse generator 13.Thyristors'9,l0 may be triggered by trigger pulse transformer 12 theprimary winding of which may be energized by trigger pulse generator 14.

In FIG. 3 reference numeral 15 has been applied to indicate a memorydevice having two inputs S and L and two outputs A and A. Application ofa voltage signal at S results in a voltage signal at A, and applicationof a voltage signal at L results in a voltage signal at inverse outputA. Memory device 15 is under the control of, two position sensors 20,21whose output indicates the respective position of current-carryingcontact means 3,4. The state of memory device 15 stores informationregarding the direction of tap change, i.e., whether the load current issupplied from tap U, by the intermediary of current-carrying contacts 3and the circuitry is ready for a change to tap U,, or whether theopposite condition prevails, i.e., the load current is derived from tapU, by the intermediary of current-carrying contacts 4 and the circuitryis ready for a change to tap U,. If memory device 15 is in its state cthere is an output voltage at A indicative of the fact thatcurrentcarrying contacts 3 are closed and current-carrying contacts 4open and the system is ready to switch outgoing load line Y from tap U,to tap U, On the other hand, if memory device 15 is in'itsstate F thereis an output voltage at A rather than at A indicative of the fact thatcurrent-carrying contacts 4 are closed and current-carrying contacts 3open and that the system is ready to switch outgoing load line Y fromtap U, to tap U In FIG. 3 reference numerals 22 and 23 have'been appliedto indicate a pair of switch position sensors of which the former sensesthe position of disconnect 'contacts S and the latter senses theposition of disconnect contacts 6. Reference numerals 24 and 25 havebeen applied to indicate a pair of voltage sensors of which the formersenses the voltage prevailing across thyristor network St, and thelatter senses the voltage prevailing across thyristor network StReference numerals 26,27,30,31'and 38,39 have been applied in FIG. 3 toindicate AND gates arranged in pairs and reference nu- -merals 34,35have been applied in that figure to indicate a pair of OR gates. Theoutput of AND-gates 38,39 controls the trigger pulse generators l3 and14, respectively, for triggering the thyristors in network St andnetwork St respectively. The interrelation of the various circuitelements or components of FIG. 3 has clearly been indicated byappropriate lines and, therefore, does not need to be described bywords.

The system shown in FIGS. 1 and 3 operates as stated below: Assumingthat current-carrying contacts 3 are initially closed and thatdisconnect contacts 5 and 6 as well as current-carrying contact 4 areinitially open. These positions of contacts 3,5,6 and 4 have been shownin FIG. I. The memory device 15 under control of sensor 20 emits avoltage signal at its terminal A which is a criterion for a transferfrom tap U, to tap U The OR- gate 34 receives a voltage signal at one ofits input terminals and therefore, transmits a voltage signal at to oneof the two input terminals of AND-gate 38. The other input terminal ofAND-gate 38 rece i ves a voltage signal from the inverse output terminalA of OR-gate 35. Since both input terminals of AND-gate 38 receive avoltage signal, the output signal of AND-gate 38 renders the triggerpulse generator 13 operative, thus causing triggering of thyristors 7and 8.

It is immaterial as far as the operation of the system of FIG. 3 isconcerned whether disconnect contacts 5 for thyristor network St, areclosed following initiation of a tap-changing operation from tap U, totap U,, or had remained closed during the stationary operation of thesystem, i.e., during the period of time network St, and disconnectcontacts 5 had been shunted by current-carrying contacts 3. The functionof disconnecting contacts 5 is to isolate thyristors 7 and 8 while theload current is being carried by current-carrying contacts 3. Disconnectcontacts 5 must, of course, be closed when current-carrying contacts 3open to make it possible for the current to commutate to network S1,.When disconnect contacts 6 close as the tap-changing operationprogresses, one of its input signals is removed from AND-gate 30 andthere is no voltage signal on any of the inputs of OR-gate 34. Hencethere is no voltage signal at the AND-gate 38, as a result of whichtrigger pulse generator 13 is rendered inoperative and thyristors 7,8are not triggered any longer. As soon as thyristors 7,8 begin to blockthe flow of current, the voltage sensor 24 transmits a voltage signal tothe AND-gate 27 whose other input terminal is receiving a voltage signalfrom the terminal A of the tap-changing direction-determining memorydevice 15. As a result, trigger pulse generator 14 is rendered operativeby the intermediary of OR-gate 35 and AND-gate 39, thus causingtriggering of thyristors 9 and in network St When disconnect contacts 5open both input terminals of AND-gate 31 receive a voltage signal and,therefore, another of the input terminals of OR-gate 35 is supplied witha voltage signal. Closing of current-carrying contacts 4 has the sameeffect as opening of disconnect contacts 5. In the former case sensor 21transmits a voltage signal to OR-gate 35, and this voltage signal isalso transmitted to the input terminal L of the tapchangingdirection-determining memory device 15, t hus causing a voltage signalto appear at the terminal A of memory device 15. Now the system is readyfor the next tap-changing operation.

In FIG. 4 the same reference characters have been applied as in FIG. 3.Therefore FIG. 4 calls for description only to the extent that itdiffers from that of FIG. 3.

The system of FIG. 4 is intended to be connected to two thyristornetworks identical to the thyristor networks St and St of FIG. 3. Thismay be achieved by trigger pulse transformers as shown in FIG. 3. FIG. 4differs from FIG. 3 by addition in the former of a pair of memorydevices 16 and 17 of which the former stores the condition of thyristors7,8 in network St, and the latter stores the condition of thyristors9,10 in network St Memory devices 16 and 17 are preferably interlocked.

In FIG. 4 the same reference characters as in FIG. 3 have been appliedto gates correlating the same parameters, i.e., those sensed by sensorsto 25.

Reference characters 28,29 in FIG. 4 have been applied to indicateAND-gates and reference characters 32,33 and 36,37 have been applied toindicate OR- gates.

The interconnection of the components of FIG. 4 is self-explanatory bythe lines indicating the connections thereof.

The operation of the system of FIGS. 1 and 4 is as follows:

Assuming that in the initial state of the system currentcarryingcontacts 3 are closed, and that disconnect contacts 5 and 6 as well ascurrent-carrying contacts 4 are open so that the load current flows fromtap U by way of contacts 1 and 3 directly to the outgoing line Y. Memorydevice 16 then has an output voltage since current-carrying contacts 3are closed, and memory device 17 has no output voltage sincecurrent-carrying contacts 4 are open. Since current-carrying contacts 3are closed, there is a voltage signal at the output terminal A of thememory device 15. Upon closing of disconnect contacts 5 and subsequentopening of current-carrying contacts 3 the load current is commutated tothyristors 7,8 of network St since trigger pulse generator 13 isoperative. Closing of disconnect contacts 6 causes sensor 23 to transmita voltage signal to AND-gate 28. The latter transmits a voltage signalto OR-gate 32, and OR-gate 32 transmits a voltage signal to the inputterminal L of memory device 16 controlling the state trigger pulsegenerator 13 is in. Memory device 16 then causes trigger pulse generator13 to become ineffective so that thyristors 7,8 are not being triggeredany longer. Though thyristors 7,8 in network St are not triggered anylonger, the flow of the load current through thyristors 7,8 continuesuntil the next zero of the current wave. Following that current zero,thyristors 7,8 block the flow of current. As soon as the blockingvoltage of thyristors 7,8 reaches a predetermined level sensor 24transmits a voltage signal to one of the input terminals of AND-gate 27.The other input terminal of AND-gate 27 is likewise supplied with avoltage signal since there is a voltage at the output terminal A ofmemory device 15. As a result, trigger pulse generator 14 is renderedoperative by the intermediary of memory device 17 and OR-gate 37, thustriggering thyristors 9,10 in network St Thereupon disconnect contacts 5are opened and current-carrying contacts 4 closed. As a result, thestate of memory device 15 storing the direction of the tapchangingoperation is reversed. The last step in the tapchanging operationconsists in fully opening of the disconnect contacts 6. Henceforth theload current flows from tap U by way of contacts 2 and 4 to the outgoingline Y.

The circuitry of FIGS. 1,3 and 4 requires that there be an overlap ofthe time of operation of the disconnect contacts 5,6, i.e., that bothremain simultaneously closed for a period of time lasting at least halfa period, or half a cycle, of the current wave. If this condition werenot met, one of the disconnect contacts 5,7, i.e., the one pair that hadbeen carrying the load current, would be compelled to part under load,or break a load current, because its associated thyristors have notturned as yet to their blocking state. This would be a ratherundesirable condition since the disconnect contacts 5,6 are not intendedto be used for current interruption and not designed to perform thisfunction.

The systems shown in FIGS. 1-4 are but two of many possible embodimentsof the invention. The invention may be expressed more generally in termsof Boolean algebra. Vitally necessary structural elements of theinvention are the three pairs of sensors 20,21;22,23 and 24,25. Thestate of the various components of the circuitry of FIG. ll may bedescribed by the following symbols:

c tap-change in one direction and Ftap-change in the opposite direction.0 and Fare indicated by the output of memory device 15.

a and lithe two states which one of the pair of disconnect contacts mayassume, a referring to the open contact state and Eto the closed state.

b and Ethe two states which the other pair of disconnect contacts mayassume, b referring to the open contact state and Fto the closed contactstate.

d and Jthe two states of one of the thyristor networks, d referring tothe state wherein there is a blocking voltage and Zi to the statewherein there is no such voltage.

h and Fthe two states which the pairs of current-carrying contacts mayassume, h referring to the open contact state and i zto the closedcontact state.

The logic circuitry of this invention may then be described by the termIn the embodiment of the invention of FIGS. 1 and 4 wherein the triggerpulse generators 13,14 are under works. This end is achieved by virtueof the fact that the logic circuitry according to this inventioncompensates for the timing of contact operation of Jansen-typetap-changing transfer switches originally designed to includetap-changing resistors, or switching resistors, which timing is normallyunacceptable where changes from one tap to another are intended to beeffected by a pair of thyristor networks.

The invention makes it further possible to convert a regulatingtransformer including a resistor transfer switch by substituting a pairof thyristor networks for the resistors of the transfer switch andadding the above logic to the regulating transformer. In effecting sucha change the existing auxiliary contacts of the transfer switchwhich hadbeen previously connected to the resistors thereof are connected to apair of thyristor networks, as described above.

A system as shown in FIG. 1 requires, in addition to a transfer switch,also a selector switch to make it possible to change between a largenumber of taps rather than merely two taps of a tapped transformerwinding. The selector switch has been deleted in FIG. 1 since itspresence or absence has no bearing on the present invention and sinceselector switches and the way to connect them into circuits is wellknown in the art and fully disclosed, inter alia, in the abovereferred-to US. Pat. Nos. 3,396,254 and 3,493,698.

I claim as my invention:

1. In a transfer switch for tap-changing regulating transformers thecombination of a. a pair of thyristor networks each including means forconnection thereof to one of a pair of taps of a tapped transformerwinding, each of said pair of networks including a pair of inverselyparallel connected thyristors;

i b. two pairs of disconnect contacts each serially connected to one ofsaid pairs of networks to connect selectively each of said pair ofnetworks to, and to disconnect selectively each of said pair of networksfrom, an outgoing load current-carrying line;

c. two pairs of current-carrying contacts each arranged to be shuntedacross one of said pair of networks and one of said two pairs ofdisconnect contacts;

d. a pair of voltage sensors each for sensing the voltage across one ofsaid pair of networks;

e. a first pair of position sensors each sensing the position of one ofsaid two pairs of disconnect contacts;

f. a second pair of position sensors each sensing the position of one ofsaid two pairs of current-carrying contacts;

g. a pair of trigger pulse generators each triggering the constituentthyristors of one of said pair of networks; and

h. a logic circuitry under the control of said pair of voltage sensors,said first pair of position sensors and said second pair of positionsensors for selectively activating and de-activating said pair oftrigger pulse generators.

2. A transfer switch as specified in claim 1 wherein said logiccircuitry includes a memory device for storing information as to thedirection of the tap-changing operation to be effected, said memorydevice being under the control of said second pair of position sensors.

3. A transfer switch as specified in claim 2 wherein said logiccircuitry includes a pair of additional memory devices for storinginformation as to the direction of the tap-changing operation to beeffected, each of said pair of additional memory devices being under thecontrol of said second pair of position sensors and having an outputterminal connected to an input terminal of one of said pair of triggerpulse generators.

4. A transfer switch for tap-changing regulating transformers includinga. a pair of thyristor networks each including means for connectionthereof to one of a pair of taps of a tapped transformer winding, eachof said pair of networks including a pair of inversely parallelconnected thyristors;

b. two pairs of disconnect contacts each serially connnected to one ofsaid pairs of networks to connect selectively each of said pair ofnetworks to, and to disconnect selectively each of said pair of networksfrom, an outgoing load current-carrying line;

c. two pairs of current-carrying contacts each arranged to be shuntedacross one of said pair of networks and one of said two pairs ofdisconnect contacts;

d. a pair of voltage sensors each for sensing the voltage across one ofsaid pair of networks;

e. a first pair of position sensors each sensing the position of one ofsaid two pairs of disconnect contacts;

f. a second pair of position sensors each sensing the.

position of one of said two pairs of currentcarrying contacts;

g. a pair of trigger pulse generators each triggering the constituentthyristors of one of said pair of networks; and

h. a logic circuitry under the control of the output signals of saidpair of voltage sensors, said first pair of position sensors and saidsecond pair of position sensors and complying with the Boolean termwherein a signifies the position of one of said two pairs of disconnectcontacts, b signified the position of oneof said two pairs ofcurrent-carrying contacts, 0 and Fsignify the respective direction inwhich the tap-changing operation is effected, d signifies the blockingvoltage of one of said networks, and h signifies the position of one ofsaid two pairs of current-carrying contacts.

b X ac) for selectively activating and de-activating said pair oftrigger voltage generators.

mg UNITED STATES PATENT OFFICE CERTIFICATE OF CORRECTION Patent NO.Dated Jan. 9,

Invenwfl Manfred Matzl It is certified that error appears in theabove-identified patent and that said Letters Patent are herebycorrected as shown below:

' On the cover page, left column, insert the following after line 6Assignee: Maschinenfabrik Reinhausen Gebruder Scheubeck K. G.

I Regensburg, Ger a Signed and sealed this 13th day of NOT/ember 1973(SEAL) Attest:

EDWARD M. PLETCI-IERJR. RENE D. TEGTMEYER 'Attesting Officer v ActingCommissioner of Patents mg UNITED STATES PATENT OFFICE CERTIFICATE OFCORRECTION Pawn No. 3, 232 T Dated Jan. 9, 1973 Invenwfl Manfred Matz].

I, It is certified that error appears in the above-identified patent andthat said Letters Patent are hereby corrected as shown below:

0n the cover page, left column, insert. the following after line 6Assignee: Maschinenfabrik Reinhausen Gebruder Schenbeck K. G.

Regensburg, Ger a Signed and sealed this 13th day of November 1973.

(SEAL) 4 Attest:

EDWARD M. FLETCHEILJR. RENE D. TEGTMEYER At testing Officer ActingCommissioner of Patents

1. In a transfer switch for tap-changing regulating transformers thecombination of a. a pair of thyristor networks each including means forconnection thereof to one of a pair of taps of a tapped transformerwinding, each of said pair of networks including a pair of inverselyparallel connected thyristors; b. two pairs of disconnect contacts eachserially connected to one of said pairs of networks to connectselectively each of said pair of networks to, and to disconnectselectively each of said pair of networks from, an outgoing loadcurrent-carrying line; c. two pairs of current-carrying contacts eacharrAnged to be shunted across one of said pair of networks and one ofsaid two pairs of disconnect contacts; d. a pair of voltage sensors eachfor sensing the voltage across one of said pair of networks; e. a firstpair of position sensors each sensing the position of one of said twopairs of disconnect contacts; f. a second pair of position sensors eachsensing the position of one of said two pairs of current-carryingcontacts; g. a pair of trigger pulse generators each triggering theconstituent thyristors of one of said pair of networks; and h. a logiccircuitry under the control of said pair of voltage sensors, said firstpair of position sensors and said second pair of position sensors forselectively activating and deactivating said pair of trigger pulsegenerators.
 2. A transfer switch as specified in claim 1 wherein saidlogic circuitry includes a memory device for storing information as tothe direction of the tap-changing operation to be effected, said memorydevice being under the control of said second pair of position sensors.3. A transfer switch as specified in claim 2 wherein said logiccircuitry includes a pair of additional memory devices for storinginformation as to the direction of the tap-changing operation to beeffected, each of said pair of additional memory devices being under thecontrol of said second pair of position sensors and having an outputterminal connected to an input terminal of one of said pair of triggerpulse generators.
 4. A transfer switch for tap-changing regulatingtransformers including a. a pair of thyristor networks each includingmeans for connection thereof to one of a pair of taps of a tappedtransformer winding, each of said pair of networks including a pair ofinversely parallel connected thyristors; b. two pairs of disconnectcontacts each serially connnected to one of said pairs of networks toconnect selectively each of said pair of networks to, and to disconnectselectively each of said pair of networks from, an outgoing loadcurrent-carrying line; c. two pairs of current-carrying contacts eacharranged to be shunted across one of said pair of networks and one ofsaid two pairs of disconnect contacts; d. a pair of voltage sensors eachfor sensing the voltage across one of said pair of networks; e. a firstpair of position sensors each sensing the position of one of said twopairs of disconnect contacts; f. a second pair of position sensors eachsensing the position of one of said two pairs of current-carryingcontacts; g. a pair of trigger pulse generators each triggering theconstituent thyristors of one of said pair of networks; and h. a logiccircuitry under the control of the output signals of said pair ofvoltage sensors, said first pair of position sensors and said secondpair of position sensors and complying with the Boolean term a X b +c(c) X d + h wherein a signifies the position of one of said two pairsof disconnect contacts, b signified the position of one of said twopairs of current-carrying contacts, c and c signify the respectivedirection in which the tap-changing operation is effected, d signifiesthe blocking voltage of one of said networks, and h signifies theposition of one of said two pairs of current-carrying contacts.
 5. Atransfer switch as specified in claim 4 wherein said logic circuitryincludes means complying with the Boolean terms c(c) X d + h and b Xc(c) for selectively activating and de-activating said pair of triggervoltage generators.